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COC402 Image Processing Accelerator for the ISA Bus
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550 MOPS OF PROCESSING POWERThe COC402 Image Processing Accelerator enhances the 4MEG VIDEO Model 12 with the processing power required by today's applications. Two 50 MHz Texas Instruments TMS320C40 digital signal processors (DSP's) allow the COC402 to perform parallel processing at up to 550 Million Operations Per Second (MOPS). This power provides video rate processing of basic imaging operations and accelerated execution of complex operations. The COC402 was designed to allow user developed programs to be executed as quickly as possible. A combination of zero wait state static RAM (SRAM) for program storage, data storage, and communications provides program execution at maximum speed. Each DSP may be programmed independently, allowing easy software development without concern for memory contention or arbitration. Ten communication ports are brought to external connectors for multiple board communication or for customer specific communication applications. |
SOFTWARE TOOLS AID DEVELOPMENTSoftware development tools are available for image processing application design and debug. A large selection of popular routines have been developed by EPIX engineers to shorten product development time. EPIX also provides tools to download user written programs. An integrated symbolic debugger is available to assist in the creation of application specific image processing products. |
SOPHISTICATED SOLUTIONSThe COC402 is ideal for applications requiring rapid analysis of image data such as machine vision, automated inspection, quality control, medical imaging, and document processing. Join the engineers, scientists, and product developers in the industrial, medical, and research environments who rely on EPIX for application assistance, imaging hardware, and imaging software solutions.
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| TMS320C40 - 50MHz, 32 bit floating point digital signal processor
capable of executing 275 MOPS.
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Image Memory Connector - Connects to the 4MEG VIDEO Model 12 to
allow images to be digitized and displayed to or from image memory.
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| Image Memory - Each TMS320C40 features four megabytes of 60 nanosecond
access, dynamic random access memory (DRAM) for storage of images. Image
resolution is software programmable. Image memory can be accessed from the
TMS320C40 as 1, 2, or 4 pixels in 160 nanoseconds. Either the TMS 320C40
or the 4MEG VIDEO Model 12 has access to the image memory.
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Address Mux - Wait State Generator, Refresh Generator and RAS/CAS
Mux provide image memory control signals and address multiplexing between
the TMS320C40 and the 4MEG VIDEO Model 12. The image memory is connected
to the Global Bus of the TMS320C40.
Data Mux - The data mux provides access to pixels in 32, 16, or 8 bit per pixel modes.
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| Static RAM - One megabyte zero wait state static random access
memory (SRAM) allows programs to run at maximum speed and is used for temporary
image storage.
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Dual Port Static RAM - Sixteen kilobytes of dual port SRAM allows
communications with the PC bus, without interfering with the DSP or PC processor.
Dual port SRAM may also be used for TMS320C40 program or data storage.
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| Address and Data Buffer - Interfaces to the PC bus for fast access
to the dual port SRAM and provides I/O ports for control of the board.
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Communication Ports - Each processor has six 20 Megabyte/sec communication ports. Five of the six are brought to external connectors. |
| 4MIP - Popular operations, such as FFT's, histograms, rotations,
subtractions, edge detections, and object tracking are included to shorten
development time. Menu driven tools allow download and execution of user
written programs. An integrated symbolic debugger offers display of memory
and registers, and supports single stepping and breakpoints.
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4MOBJ - Programming libraries, for DOS or Windows, include sample code for simple image operations and allow user written code to be added to the large selection of functions already developed. A loader provides run-time relocation of programs. |
The 4MEG VIDEO Model 12 operates with the COC402 to provide image acquisition and display. The Model 12 provides:
The table below lists the time in microseconds per pixel for selected image
processing operations performed using one TMS320C40 (275 MOPS) running at 50
MHz on the COC402. The tests were performed using 4MIP software.
| Processing Operation | Time µsec/pixel | Processing Operation | Time µsec/pixel |
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| Two Image Average | 0.49 | Erode | 0.45 |
| Complement | 0.08 | Dilate | 0.45 |
| Pixel AND w. Constant | 0.08 | Copy | 0.08 |
| Pixel OR w. Constant | 0.08 | Histogram | 0.21 |
| Pixel Thresholding | 0.32 | FTT (512x512) | 2.05 |
| 3x3 Convolution | 1.07 | Rotation | 1.24 |
| Two Image Addition | 0.45 | Center of Mass | 0.28 |
| Two Image Subtraction | 0.45 | Laplacian Edge Detector (3x3) | 0.60 |
Speed subject to image size.
Block Diagram for a Single TMS320C40 on the COC40 Board.
ISA BUS REQUIREMENTS
IMAGING BOARDThe COC40 series of image processing accelerators are designed to be used with a 4MEG VIDEO Model 12 revision 4.2 or later imaging board. |
SOFTWARE DSP TOOLSA loader for user written TMS320C40 imaging programs assembled by TEXAS INSTRUMENTS tools is available in the 4MOBJ programming library. A symbolic debugger for TMS320C40 imaging programs is available in the 4MIP Interactive Image Analysis program. APPLICATIONS
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Specifications and prices subject to change without notice.
EPIX® imaging products are made in the USA.
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